Freescale Semiconductor /MKW21Z4 /XCVR_TSM_REGS /TIMING05

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TIMING05

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BB_LDO_VCOLO_EN_TX_HI 0BB_LDO_VCOLO_EN_TX_LO 0BB_LDO_VCOLO_EN_RX_HI 0BB_LDO_VCOLO_EN_RX_LO

Description

TSM_TIMING05

Fields

BB_LDO_VCOLO_EN_TX_HI

Assertion time setting for BB_LDO_VCOLO_EN (TX)

BB_LDO_VCOLO_EN_TX_LO

De-assertion time setting for BB_LDO_VCOLO_EN (TX)

BB_LDO_VCOLO_EN_RX_HI

Assertion time setting for BB_LDO_VCOLO_EN (RX)

BB_LDO_VCOLO_EN_RX_LO

De-assertion time setting for BB_LDO_VCOLO_EN (RX)

Links

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